Skip to main content
  • Book
  • © 2019

Transactions on High-Performance Embedded Architectures and Compilers V

  • Original research on systems targeted at specific computing tasks
  • Of interest to researchers and practitioners designing future embedded systems
  • Covers all aspects of computer architecture, code generation and compiler optimization methods

Part of the book series: Lecture Notes in Computer Science (LNCS, volume 11225)

Part of the book sub series: Transactions on High-Performance Embedded Architectures and Compilers (THIPEAC)

  • 2849 Accesses

Buy it now

Buying options

eBook USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

This is a preview of subscription content, log in via an institution to check for access.

Table of contents (7 chapters)

  1. Front Matter

    Pages I-IX
  2. Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards

    • Richard Membarth, Hritam Dutta, Frank Hannig, Jürgen Teich
    Pages 1-20
  3. Programmable and Scalable Architecture for Graphics Processing Units

    • Carlos S. de La Lama, Pekka Jääskeläinen, Heikki Kultala, Jarmo Takala
    Pages 21-38
  4. Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs

    • Tjerk Bijlsma, Marco J. G. Bekooij, Gerard J. M. Smit
    Pages 39-58
  5. Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability

    • George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Xiaojun Yang, Dionisios Pnevmatikatos et al.
    Pages 100-120
  6. A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design

    • Ricardo Ferreira, Cristoferson Bueno, Marcone Laure, Monica Pereira, Luigi Carro
    Pages 121-139
  7. Back Matter

    Pages 141-141

About this book

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded computer systems. Recognizing the convergence of embedded and general-purpose computer systems, this journal publishes original research on systems targeted at specific computing tasks as well as systems with broad application bases. The scope of the journal therefore covers all aspects of computer  architecture, code generation and compiler optimization methods of interest to researchers and practitioners designing future embedded systems.


This 5th issue  contains extended versions of papers by the best paper award candidates of IC-SAMOS 2009 and the SAMOS 2009 Workshop, colocated events of the 9th International Symposium on Systems, Architectures, Modeling and Simulation, SAMOS 2009, held in Samos, Greece, in 2009. The 7 papers included in this volume were carefully reviewed and selected. The papers cover research on embedded processor hardware/software design and integration and present challenging research trends.

Editors and Affiliations

  • Department of Computer Science and Engineering, Chalmers University of Technology, Gothenburg, Sweden

    Per Stenström

  • Politecnico di Milano, Milan, Italy

    Cristina Silvano

  • Delft University of Technology, Delft, The Netherlands

    Koen Bertels

  • University of Wisconsin–Madison, Madison, USA

    Michael Schulte

Bibliographic Information

Buy it now

Buying options

eBook USD 39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access