The Best of ICCAD

1. Front Matter

   Pages i-xvii

   PDF

2. Functional Verification

   1. Front Matter

      Pages 1-1

      PDF

   2. Formal Methods for Functional Verification

      • Randal E. Bryant, James H. Kukula

      Pages 3-15

   3. Automating the Diagnosis and the Rectification of Design Errors with PRIAM

      • Jean Christophe Madre, Olivier Coudert, Jean Paul Billon

      Pages 17-27

   4. Functional Comparison of Logic Designs for VLSI Circuits

      • C. Leonard Berman, Louise H. Trevillyan

      Pages 29-38

   5. A Unified Framework for the Formal Verification of Sequential Circuits

      • Olivier Coudert, Jean Christophe Madre

      Pages 39-50

   6. Dynamic Variable Ordering for Ordered Binary Decision Diagrams

      • R. Rudell

      Pages 51-63

   7. Verification of Large Synthesized Designs

      • Daniel Brand

      Pages 65-72

   8. Grasp—A New Search Algorithm for Satisfiability

      • João P. Marques Silva, Karem A. Sakallah

      Pages 73-89

3. System Design and Analysis

   1. Front Matter

      Pages 91-91

      PDF

   2. System Design and Analysis Overview

      • Hugo De Man, Jan Rabaey

      Pages 93-106

   3. An Efficient Microcode-Compiler for Custom DSP-Processors

      • Gert Goossens, Jan Rabaey, Joos Vandewalle, Hugo De Man

      Pages 107-116

   4. HYPER-LP: A System for Power Minimization Using Architectural Transformations

      • Anantha P. Chandrakasan, Miodrag Potkonjak, Jan Rabaey, Robert W. Brodersen

      Pages 117-127

   5. Power Analysis of Embedded Software: First Step Towards Software Power Minimization

      • Vivek Tiwari, Sharad Malik, Andrew Wolfe

      Pages 129-142

   6. A Methodology for Correct-by-Construction Latency Insensitive Design

      • Luca P. Carloni, Kenneth L. McMillan, Alexander Saldanha, Alberto L. Sangiovanni-Vincentelli

      Pages 143-158

   7. Exploring Performance Tradeoffs for Clustered VLIW ASIPs

      • Margarida F. Jacome, Gustavo de Veciana, Viktor Lapinskii

      Pages 159-177

4. Logic Synthesis

   1. Front Matter

      Pages 179-179

      PDF

   2. Logic Synthesis Overview

      • Robert K. Brayton, John A. Darringer

      Pages 181-189

   3. Multiple-Level Logic Optimization System

      • R. Brayton, E. Detjens, N. Phillips, S. Krishna, T. Ma, P. McGeer et al.

      Pages 191-203

   4. Exact Minimization of Multiple-Valued Functions for PLA Optimization

      • R. Rudell, A. Sangiovanni-Vincentelli

      Pages 205-216

In 2002, the International Conference on Computer Aided Design (ICCAD) celebrates its 20th anniversary. This book commemorates contributions made by ICCAD to the broad field of design automation during that time. The foundation of ICCAD in 1982 coincided with the growth of Large Scale Integration. The sharply increased functionality of board-level circuits led to a major demand for more powerful Electronic Design Automation (EDA) tools. At the same time, LSI grew quickly and advanced circuit integration became widely avail­ able. This, in turn, required new tools, using sophisticated modeling, analysis and optimization algorithms in order to manage the evermore complex design processes. Not surprisingly, during the same period, a number of start-up com­ panies began to commercialize EDA solutions, complementing various existing in-house efforts. The overall increased interest in Design Automation (DA) re­ quired a new forum for the emerging community of EDA professionals; one which would be focused on the publication of high-quality research results and provide a structure for the exchange of ideas on a broad scale. Many of the original ICCAD volunteers were also members of CANDE (Computer-Aided Network Design), a workshop of the IEEE Circuits and Sys­ tem Society. In fact, it was at a CANDE workshop that Bill McCalla suggested the creation of a conference for the EDA professional. (Bill later developed the name).

• CMOS
• FPGA
• FPGA design
• Field Programmable Gate Array
• Transistor
• VLSI
• algorithms
• circuit design
• construction
• digital signal processor
• formal method
• modeling
• optimization
• simulation
• static-induction transistor

• Cadence Berkeley Labs, Berkeley, USA

  Andreas Kuehlmann

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