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DSP implementation of modified variable vector quantization based image compression using DCT and synthesis on FPGA

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Abstract

In the extant context of data compression, numerous data reduction techniques have evolved and produced many innovative solutions. These elucidations may have resulted in further complexities during physical realizations. This research endeavor put forth experimentation outcomes in the field of Discrete Cosine Transform (DCT) based image compression using modified vector quantization and prototyping the algorithm on Digital Signal Processor (DSP) TMS320C6713 platform. In addition, such an algorithm is synthesized on Virtex5 XC5VSX50T Field Programmable Gate Array (FPGA). The performance metrics used and calculated here at algorithm level are Mean Square Error (MSE), Peak Signal to Noise Ratio (PSNR_, Compression Ratio (CR), Bits per Pixel (bpp), percentage Space Saving in accordance with modified variable vector quantization levels from 10 to 90.

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Acknowledgements

The authors would like to thank the AICTE-RPS Grants (Ref. no.: 8023/RID/RPS-115(Pvt.)/2011-12) for providing financial assistance towards this research work.

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  1. Department of E&CE, SDMCET, Dharwad, Karnataka, India

    Mahendra M. Dixit & C. Vijaya

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  1. Mahendra M. Dixit
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  2. C. Vijaya
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Correspondence to Mahendra M. Dixit.

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Dixit, M.M., Vijaya, C. DSP implementation of modified variable vector quantization based image compression using DCT and synthesis on FPGA. Int. j. inf. tecnol. 11, 203–212 (2019). https://doi.org/10.1007/s41870-018-0162-8

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  • DOI: https://doi.org/10.1007/s41870-018-0162-8

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