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1-Bit FinFET Carry Cells for Low Voltage High-Speed Digital Signal Processing Applications

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Abstract

In this paper, new high speed and low voltage 1-bit FinFET full adder carry cells are proposed for multi-bit arithmetic applications used in Digital Signal Processing (DSP) architectures. The full adder carry cells are important blocks for producing all arithmetic results such as multiplication, subtraction and addition. The main purpose of this work is to decrease the propagation delay and total power dissipation of the full adder circuit in multi-bit adder applications. Similarly, the proposed carry circuits also reduce the total chip area as it requires few transistors to perform the carry operation. Carry cell, XOR gate and sum circuit are used to produce the full adder operation. This article also presents eight new full adder circuits based on the new carry circuit designs. FinFET 18 nm technology used to design and test the proposed carry and full adder circuits with 0.5 V supply voltage. Cadence virtuoso model parameters have been used to design and test the proposed and existing designs in the literature. Several simulation results indicate that the proposed circuits outperform standard full adders in terms of power delay product (PDP), delay and power. The 8-bit Ripple Carry Adder (RCA) circuit was also designed to verify the functionality of the proposed carry and full adder circuits. When compared to existing full adder circuits based RCAs, the proposed full adder circuits based RCA results were found to be with less delay. All the proposed and existing circuits are investigated in terms of delay, power and PDP with different output load capacitances and supply voltages.

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Acknowledgements

The author expresses their sincere gratitude to anonymous reviewers and the editor for their comments and suggestions towards improvement of this manuscript.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, MLR Institute of Technology, Hyderabad, 500043, India

    Chandra Shaker Pittala

  2. Department of Electronics and Communication Engineering, Institute of Aeronautical Engineering, Dundigal, 500043, Hyderabad, Telengana, India

    Vallabhuni Vijay

  3. School of Electronics Systems and Automation, Digital University Kerala (Former IIITM-Kerala), Thiruvananthapuram, India

    B. Naresh Kumar Reddy

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  1. Chandra Shaker Pittala
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  2. Vallabhuni Vijay
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  3. B. Naresh Kumar Reddy
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Contributions

The authors have investigated to design and test the carry and full adder circuits with 0.5 V supply voltage, in this work. All the authors have contributed to this work.

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Correspondence to B. Naresh Kumar Reddy.

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Pittala, C.S., Vijay, V. & Reddy, B.N.K. 1-Bit FinFET Carry Cells for Low Voltage High-Speed Digital Signal Processing Applications. Silicon 15, 713–724 (2023). https://doi.org/10.1007/s12633-022-02016-8

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