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Dual active capacitive feedbacks for output capacitor-less low-dropout regulator

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Abstract

An output capacitor-less low-dropout (OCL-LDO) voltage regulator with dual active feedback paths is presented in this paper. The dual active feedbacks provide frequency compensation and spike voltage suppression. Two feedback loops are formed by capacitors Cc and Ca, respectively. The capacitor Ca path detects output voltage to suppress undershoot and overshoot during load transient. The frequency compensation is achieved by capacitor Cc, which helps the LDO regulator not only improve stability, but also enhance transient response without large current consumption. The total utilized capacitance values are only 1.5 pF. The proposed OCL-LDO was fabricated in 0.18 μm CMOS technology with supply voltage of 1.8 V. The LDO consumes 21 μA of quiescent current and the chip area is 0.47 mm × 0.49 mm. The measured output voltage difference is 90 mV when the load current is increased from 50 μA to 100 mA with CL= 100 pF and recovery time less than 1 μs. The power supply rejection is − 51.7 dB at 1 kHz.

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Acknowledgements

The authors would like to thank National Chip Implementation Center (CIC), Taiwan for their support on chip fabrication. This work was supported by Ministry of Science and Technology (MOST).

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  1. Department of Electrical and Computer Engineering, National Chiao Tung University, Hsinchu, 300, Taiwan

    Chung-Cheng Su & Chung-Chih Hung

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  1. Chung-Cheng Su
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Correspondence to Chung-Chih Hung.

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Su, CC., Hung, CC. Dual active capacitive feedbacks for output capacitor-less low-dropout regulator. Analog Integr Circ Sig Process 101, 573–584 (2019). https://doi.org/10.1007/s10470-019-01500-3

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