Abstract
An energy-efficient scaled-down reference (SDR) digital-to-analogue converter switching sequence is presented for a low-power successive approximation register analogue-to-digital converter. Owing to the fact that the proposed technique utilizes only a quarter of the capacitor array for input sampling, an SDR (Vref/4) and ground (Gnd) for the same input are required for conversion cycles, which achieve reduced switching energy and high linearity. The SDR switching structure improves the efficiency of average switching energy by 99.61% and reduces the total number of required capacitors in the digital-to-analogue converter arrays by 50% compared to the conventional structure.
This is a preview of subscription content, log in via an institution to check access.
References
Liu, C. C., Chang, S. J., Huang, G. Y., & Lin, Y. Z. (2010). A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure. IEEE Journal of Solid-State Circuits, 45(4), 731–740.
Zhu, Y., Chan, C.-H., Chio, U.-F., Sin, S.-W., Seng-Pan, U., Martins, R. P., et al. (2010). A 10-bit 100-MS/s reference-free SAR ADC in 90 nm CMOS. IEEE Journal of Solid-State Circuits, 45(6), 1111–1121.
Yuan, C., & Lam, Y. (2012). Low-energy and area-efficient tri-level switching scheme for SAR ADC. Electronics Letters, 48(9), 482–483.
Zhu, Z., Xiao, Y., & Song, X. (2013). VCM-based monotonic capacitor switching scheme for SAR ADC. Electronics Letters, 49(5), 327–329.
Xie, L., Su, J., Liu, J., & Wen, G. (2015). Energy-efficient capacitor-splitting DAC scheme with high accuracy for SAR ADCs. Electronics Letters, 51(6), 460–462.
Tong, X., & Zhang, Y. (2015). 98.8% switching energy reduction in SAR ADC for bioelectronics application. Electronics Letters, 51(9), 1052–1054.
Baek, S., Lee, K., & Lee, M. (2018). Energy-efficient switching scheme for SAR ADC using zero-energy dual capacitor switching. Analog Integrated Circuits and Signal Processing, 94(2), 317–322.
Koa, C.-C., Hsieh, S.-E., & Hsieh, C.-C. (2017). A 0.5 V 12-bit SAR ADC using adaptive time-domain comparator with noise optimization. In IEEE Asian solid-state circuits conference (pp. 213–216).
Osipov, D., & Paul, St. (2016). Two-step reset method for energy-efficient SAR ADC switching schemes. Electronics Letters, 52(10), 816–817.
Acknowledgements
This research was supported by the National Research Foundation of Korea Grant funded by the Korean Government (NRF-2016R1A2B4016544).
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Baek, SU., Lee, SW., Lee, KY. et al. Scaled-down reference switching scheme for low-power SAR ADCs. Analog Integr Circ Sig Process 97, 143–148 (2018). https://doi.org/10.1007/s10470-018-1279-1
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10470-018-1279-1