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Energy-efficient switching scheme based on floating technique for SAR ADC

  • Mixed Signal Letter
  • Published:
Analog Integrated Circuits and Signal Processing Aims and scope Submit manuscript

Abstract

A high energy-efficiency capacitor switching scheme for successive approximation register (SAR) analog-to-digital converters is proposed in the paper. During the design procedure, the charge characteristic of the floating capacitor and the technique of splitting capacitor ensure zero energy consumption of switching operation. With the reset energy of capacitor arrays taken into account, the proposed switching scheme can achieve 100% less switching energy over the conventional switching scheme. Furthermore, this work also achieves about 50% area reduction with only two reference voltages. The behavioral simulation of the proposed SAR was performed, the maximum differential nonlinearity and maximum integral nonlinearity are 0.451 and 0.452 LSB respectively.

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Acknowledgments

This work was supported by the National Natural Science Foundation of China (Nos. 61674118, 61504104, 61625403), National Science and Technology Major Project of China (No. 2016ZX03002007).

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Authors and Affiliations

  1. School of Microelectronics, Xidian University, Xi’an, 710071, People’s Republic of China

    Ruixue Ding, Depeng Sun, Shubin Liu, Hongzhi Liang & Zhangming Zhu

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  1. Ruixue Ding
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  2. Depeng Sun
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  3. Shubin Liu
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  4. Hongzhi Liang
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  5. Zhangming Zhu
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Correspondence to Shubin Liu.

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Ding, R., Sun, D., Liu, S. et al. Energy-efficient switching scheme based on floating technique for SAR ADC. Analog Integr Circ Sig Process 97, 115–122 (2018). https://doi.org/10.1007/s10470-018-1242-1

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  • DOI: https://doi.org/10.1007/s10470-018-1242-1

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