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A new design methodology for voltage-to-frequency converters (VFCs) circuits suitable for time-based analog-to-digital converters (T-ADCs)

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Abstract

Analog-to-digital converter (ADC) is one of the crucial blocks for the software defined radio applications that require higher resolution, and less power consumption; accordingly, time-based analog to digital converters (T-ADC) are introduced to make use of the technology scaling, achieving low-power consumption and high-speed compared to traditional ADCs. T-ADC is composed of two parts voltage-to-time converter and time-to-digital converter; the proposed design is based on converting the voltage to frequency instead of time using the voltage-to-frequency converter. The new methodology increases the circuit sensitivity, and reduces the linearity error. Furthermore, the new methodology enhances the maximum input frequency, effective number of bits (ENOB), and signal to noise and distortion ratio (SNDR). In the proposed study, the maximum input frequency increases up to 74.8 MHz with linearity error of 3%, sensitivity of 43.24 GHz/V, ENOB of 2.79 bits and SNDR of 18.54 dB using TSMC 65 nm CMOS technology with a supply voltage of 1.2 V.

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References

  1. Watanabe, T., Mizuno, T., & Makino, Y. (2003). An all-digital analog-to-digital converter with 12-mu;v/lsb using moving-average filtering. IEEE Journal of Solid-State Circuits, 38(1), 120–125.

    Article  Google Scholar 

  2. Staszewski, R. B., Muhammad, K., et al. (2004). All-digital tx frequency synthesizer and discrete-time receiver for bluetooth radio in 130-nm cmos. IEEE Journal of Solid-State Circuits, 39(12), 2278–2291.

    Article  Google Scholar 

  3. Mostafa, H., & Ismail, Y. I. (2013). Highly-linear voltage-to-time converter (VTC) circuit for time-based analog-to-digital converters (T-ADCs). In 2013 IEEE 20th international conference on electronics, circuits, and systems (ICECS) (pp. 149–152).

  4. Hassan, A. H., Mostafa, H., Ismail, T., & Gabran, S. R. I. (2016). ’An ultra-low power voltage-to-time converter (VTC) circuit for low power and low speed applications. In 2016 29th IEEE international system-on-chip conference (SOCC) (pp. 178–182).

  5. Roberts, G. W., & Ali-Bakhshian, M. (2010). A brief introduction to time-to-digital and digital-to-time converters. IEEE Transactions on Circuits and Systems—II, 57(3), 153–157.

    Google Scholar 

  6. Naraghi, S., Courcy, M., Flynn, M. P., & Member, S. (2010). A 9-bit, 14 \(\mu W\) and 0.06 \(mm^{2}\)pulse position modulation ADC in 90 nm digital CMOS. IEEE Journal of Solid-State Circuits, 45(9), 1870–1880.

    Article  Google Scholar 

  7. Hassan, A. H., Ismail, M. W., Ismail, Y., & Mostafa, H. (2016). A 200 MS/s 8-bit time-based analog-to-digital converter with inherit sample and hold. In 2016 29th IEEE international system-on-chip conference (SOCC) (pp. 120–124).

  8. Macpherson, A., Belostotski, L., & Haslett, J. W. (2015). 65-nm CMOS voltage-to-time converter for 5-GS/s time-based ADCs. Circuits, Systems, and Signal Processing, 34(10), 3121–3145.

    Article  Google Scholar 

  9. Hassan, A. H., Ali, A., Ismail, M. W., Refky, M., Ismail, Y., & Mostafa, H. (2017). A 1 GS/s 6-bit time-based analog-to-digital converter (T-ADC) for front-end receivers. In 2017 IEEE 60th international midwest symposium on circuits and systems (MWSCAS) (pp. 1605–1608).

  10. Xu, Y., Wu, G., Belostotski, L., & Haslett, J. W. (2016). 5-bit 5-GS/s non interleaved time-based ADC in 65-nm CMOS for radio-astronomy applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 99, 1–13.

    Google Scholar 

  11. Macpherson, A. R., Townsend, K. A., & Haslett, J. W. (2009). A 5GS/s voltage-to-time converter in 90 nm CMOS. In Proceedings of the 4th European microwave integrated circuits conference (EuMIC’09) (pp. 254–257).

  12. Djemouai, A., Sawan, M., & Slamani, M. (1999). New 200 MHz frequency using notch filtering at the VTC input or by using switches locked loop based on new frequency-to-voltage converters approach. In IEEE international symposium on circuits and systems (ISCAS’99) (pp. 89–92).

  13. Maymandi-Nejad, M., & Sachdev, M. (2005). A monotonic digitally controlled delay element. IEEE Journal of Solid State Circuits, 40(11), 2212–2219.

    Article  Google Scholar 

  14. Straayer, M. Z., & Perrott, M. H. (2008). A 12-bit, 10-MHz bandwidth, continuous-time \(\Sigma \Delta\) ADC with a 5-Bit, 950-MS/s VCO-based quantizer. IEEE Journal of Solid-State Circuits, 43(4), 805–814.

    Article  Google Scholar 

  15. Perrott, M. H. (2011). VCO-based wideband continuous-time sigma-delta analog-to-digital converters. In H. Casier, M. Steyaert, A. van Roermund (Eds.), Analog circuit design. Dordrecht: Springer.

  16. Ziabakhsh, S., Gagnon, G., & Roberts, G. W. (2015). Wide-range linear voltage-controlled delay for time-mode signal processing. In IEEE international symposium on circuits and systems (ISCAS) (pp. 1826–1829).

  17. ElGabry, M. A., Mostafa, H., & Soliman, A. M. (2016). A comparative study of the voltage-to-time converters (VTCs) and the voltage-to-frequency converters (VFCs) circuits. In 2016 4th international Japan–Egypt conference on electronics, communications and computers (JEC-ECC) (pp. 21–24). Cairo.

  18. Ismail, M. W., & Mostafa, H. (2014). A new design methodology for voltage-to-time converters (VTCs) circuits suitable for time-based analog-to-digital converters (T-ADC). In IEEE international system on chip conference (SOCC) (pp. 103–108).

  19. Pekau, H., Yousif, A., & Haslett, J. (2006). A CMOS integrated linear voltage-to-pulse-delay-time converter for time based analog-to-digital converters. In 2006 IEEE international symposium on circuits and systems (ISCAS) (pp. 2373–2376).

  20. Refky, M., & Leung, B. (2016). Design techniques for linearity in time based sigma delta analog to digital converter. IEEE Transactions on Circuits and Systems II: Express Briefs, 63(5), 433–437.

    Article  Google Scholar 

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Acknowledgements

This work was partially funded by ONE Lab at Cairo University, Zewail City of Science and Technology, AUC, NTRA, ITIDA, SRC, ASRT, the STDF, Intel, Mentor Graphics, MCIT, NSERC.

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Authors and Affiliations

  1. Electronics and Communications Engineering Department, Cairo University, Cairo, Egypt

    Mohammed A. ElGabry, Ali H. Hassan, Hassan Mostafa & Ahmed M. Soliman

  2. Center for Nanoelectronics and Devices, Zewail City of Science and Technology, New Cairo, Egypt

    Hassan Mostafa

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  1. Mohammed A. ElGabry
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  2. Ali H. Hassan
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  3. Hassan Mostafa
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  4. Ahmed M. Soliman
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Correspondence to Hassan Mostafa.

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ElGabry, M.A., Hassan, A.H., Mostafa, H. et al. A new design methodology for voltage-to-frequency converters (VFCs) circuits suitable for time-based analog-to-digital converters (T-ADCs). Analog Integr Circ Sig Process 94, 277–287 (2018). https://doi.org/10.1007/s10470-017-1092-2

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  • DOI: https://doi.org/10.1007/s10470-017-1092-2

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