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Impulse response analysis of carrier-modulated multiband RF-interconnect (MRFI)

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Abstract

Impulse response of energy-efficient multiband RF-interconnect (MRFI) is analyzed to quantify its information capacity for transmitting digital data via various types of physical wires. Our analyses in frequency domain (also transferrable to time domain if needed) indicate that a baseband-equivalent impulse response can be established for MRFI under coherently communicated systems. We can further express such response in an explicit form for MRFI with low-pass transmission nature. It also reveals its distinct capability in signal equalization as a result of its RF-carrier down-conversion process. Furthermore, the analysis offers a guidance of how to construct baseband-equivalent impulse response when transmission lines contain non-ideal effects such as frequency notches and in-band ripples.

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References

  1. Saltzberg, B. (1967). Performance of an efficient parallel data transmission system. IEEE Transactions on Communications, 15(6), 805–811.

    Article  Google Scholar 

  2. Morgen, D. H. (1975). Expected crosstalk performance of analog multichannel subscriber carrier systems. IEEE Transactions on Communications, 23(2), 240–245.

    Article  Google Scholar 

  3. Ahamed, S. V., Bohn, P. P., & Gottfried, N. L. (1981). A tutorial on two-wire digital transmission in the loop plant. IEEE Transactions on Communications, 28(11), 1554–1564.

    Article  Google Scholar 

  4. Chow, P. S., Tu, J. C., & Cioffi, J. M. (1991). Performance evaluation of a multichannel transceiver system for ADSL and VHDSL services. IEEE Journal on Selected Areas in Communications, 9(6), 909–917.

    Article  Google Scholar 

  5. Chow, P. S., Cioffi, J. M., & Bingham, J. A. C. (1995). A practical discrete multitone transceiver loading algorithm for data transmission over spectrally shaped channels. IEEE Transactions on Communications, 43(2), 773–775.

    Article  Google Scholar 

  6. Barton, M., Chang, L., & Hsing, T. R. (1996). Performance study of high-speed asymmetric digital subscriber lines technology. IEEE Transactions on Communications Conference, 44(2), 156–157.

    Article  Google Scholar 

  7. Amirkhany, A., Stojanovic, V., & Horowitz, M. A. (2004). Multi-tone signaling for high-speed backplane electrical links. In IEEE Global Telecommunications Conference, 2004.

  8. Sartenaer, T., Vandendorpe, L., & Louveaux, J. (2005). Balanced capacity of wireline multiuser channels. IEEE Transactions on Communications, 53(12), 2029–2042.

    Article  Google Scholar 

  9. Chang, M. C. F., Roychowdhury, V. P., Zhang, L., Shin, H., & Qian, Y. (2001). RF/wireless interconnect for inter- and intra-chip communications. IEEE Proceedings, 89(4), 456–466.

    Article  Google Scholar 

  10. Gu, Q., Xu, Z., Kim, J., Ko, J., & Chang, M. C. F. (2004). Three-dimensional circuit integration based on self-synchronized Rf-interconnect using capacitive coupling. In IEEE symposium on VLSI technology and circuits, 2004.

  11. Ko, J., Kim, J., Xu, Z., Gu, Q., Chien, C., & Chang, M. C. F. (2005). An RF/baseband FDMA-interconnect transceiver for reconfigurable multiple access chip-to-chip communication. In IEEE solid-state circuits conference, 2005.

  12. Tam, S. W., Socher, E., Wong, A., & Chang, M. C. F. (2009). A simultaneous tri-band on-chip RF-interconnect for future network-on-chip. In IEEE symposium on VLSI circuits, 2009.

  13. Byun, G., Kim, Y., Kim, J., Tam, S. W., Cong, J., Reinman, G., et al. (2011). An 8.4 Gb/s 2.5 pJ mobile memory I/O interface using bi-directional and simultaneous dual (Base + RF)-band signaling. In IEEE Solid-State Circuits Conference, 2011.

  14. Kim, Y., Byun, G., Tang, A., Jou, C., Hsien, H., Reinman, G., et al. (2012). An 8 Gb/s/pin 4 pJ/b/pin single-T-line dual (Base + RF) band simultaneous bidirectional mobile memory I/O interface. In IEEE international solid-state circuits conference, 2012.

  15. Jalalifar, M., & Byun, G. (2016). A 14.4 Gb/s/pin 230 fJ/b/pin/mm multi-level RF-interconnect for global network-on-chip communication. In IEEE Asian solid-state circuits conference, 2016.

  16. Byun, G., Kim, Y., Kim, J., Tam, S. W., & Chang, M. C. F. (2012). An energy-efficient and high-speed mobile memory I/O interface using simultaneous bi-directional dual (Base + RF)-band signaling. IEEE Journal of Solid-State Circuits, 47(1), 117–130.

    Article  Google Scholar 

  17. Kim, Y., Tam, S., Byun, G., Wu, H., Nan, L., Reinman, G., et al. (2012). Analysis of noncoherent ASK modulation-based RF-interconnect for memory interface. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2(2), 200–209.

    Article  Google Scholar 

  18. Ibrahim, S., & Razavi, B. (2009). Design requirements of 20-Gb/s serial links using multi-tone signaling. In IEEE international symposium on circuits and systems, 2009.

  19. Cho, W., Li, Y., Kim, Y., Huang, P., Du, Y., Lee, S., et al. (2015). A 5.4 mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface. In IEEE custom integrated circuits conference, 2015.

  20. Cho, W., Li, Y., Du, Y., Wong, C., Du, J., Huang, P., et al. (2016). A 38 mW 40 Gb/s 4-lane tri-band PAM-4/16-QAM transceiver in 28 nm CMOS for high-speed memory interface. In IEEE solid-state circuits conference, 2016.

  21. Du, Y., Cho, W., Li, Y., Wong, C., Du, J., Huang, P., et al. (2016). A 16 Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16/256-QAM and channel response detection in 28 nm CMOS. In IEEE symposium on VLSI circuits, 2016.

  22. Gharibdoust, K., Tajalli, A., & Leblebici, Y. (2015). Hybrid NRZ/multi-tone serial data transceiver for multi-drop memory interfaces. IEEE Journal of Solid-State Circuits, 50(12), 3133–3144.

    Article  Google Scholar 

  23. Gharibdoust, K., Tajalli, A., & Leblebici, Y. (2016). A 4 × 9 Gb/s 1 pJ/b hybrid NRZ/multi-tone I/O with crosstalk and ISI reduction for dense interconnects. IEEE Journal of Solid-State Circuit, 51(4), 992–1002.

    Article  Google Scholar 

  24. Pozar, D. M. (2005). Microwave engineering (Vol. 3). New York: Wiley.

    Google Scholar 

  25. Kim, Y., Nan, L., Cong, J., & Chang, M. C. F. (2013). High-speed mm-wave data-link based on hollow plastic cable and CMOS transceiver. IEEE Microwave and Wireless Components Letter, 23(12), 674–676.

    Article  Google Scholar 

  26. Frans, Y., McLeod, S., Hedayati, H., Elzeftawi, M., Namkoong, J., Lin, W., et al. (2016). A 40-to-60 Gb/s NRZ transmitter with supply-regulated front-end in 16 nm FinFET. IEEE Journal of Solid State Circuits, 51(12), 3167–3177.

    Article  Google Scholar 

  27. Bassi, M., Radice, F., Bruccoleri, M., Erba, S., & Mazzanti, A. (2016). A high-swing 45 Gb/s hybrid voltage and current-mode PAM-4 transmitter in 28 nm CMOS FDSOI. IEEE Journal of Solid State Circuits, 51(11), 2702–2715.

    Article  Google Scholar 

  28. Han, J., Lu, Y., Sutardja, N., Jung, K., & Alon, E. (2016). Design techniques for a 60 Gb/s 173 mW wireline receiver frontend in 65 nm CMOS technology. IEEE Journal of Solid State Circuits, 51(4), 871–880.

    Article  Google Scholar 

  29. Kocaman, N., Ali, T., Rao, L., Singh, U., Abdul-Latif, M., Liu, Y., et al. (2016). A 3.8 mW/Gbps quad-channel 8.5–13 Gbps serial link with a 5 tap DFE and a 4 tap transmit FFE in 28 nm CMOS. IEEE Journal of Solid State Circuits, 41(4), 881–892.

    Google Scholar 

  30. Du, Y., Cho, W., Huang, P., Li, Y., Wong, C., Du, J., et al. (2016). A 16-Gb/s 14-mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16/256-QAM and channel response detection. IEEE Journal of Solid State Circuits, 52(4), 1111–1122.

    Article  Google Scholar 

  31. Wang, D., Jacob, B., & Ng, S. (2008). Memory systems: Cache, DRAM, disk. San Francisco: Morgan Kaufmann.

    Google Scholar 

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Authors and Affiliations

  1. University of California, Los Angeles, CA, USA

    Yanghyo Kim, Wei-Han Cho, Yuan Du, Jason Cong, Tatsuo Itoh & Mau-Chung Frank Chang

  2. Jet Propulsion Laboratory, Pasadena, CA, USA

    Yanghyo Kim

  3. National Chiao Tung University, Hsinchu City, Taiwan

    Mau-Chung Frank Chang

Authors
  1. Yanghyo Kim
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  2. Wei-Han Cho
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  3. Yuan Du
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  4. Jason Cong
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  5. Tatsuo Itoh
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  6. Mau-Chung Frank Chang
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Correspondence to Yanghyo Kim.

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Kim, Y., Cho, WH., Du, Y. et al. Impulse response analysis of carrier-modulated multiband RF-interconnect (MRFI). Analog Integr Circ Sig Process 93, 395–413 (2017). https://doi.org/10.1007/s10470-017-1058-4

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  • DOI: https://doi.org/10.1007/s10470-017-1058-4

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