Abstract
The noise and jitter characteristics of an on-chip voltage reference-locked ring oscillator used in the time-to-digital converter (TDC) of the integrated receiver of a pulsed time-of-flight laser rangefinder are presented. The frequency of the ring oscillator, 683 MHz, was locked to the on-chip voltage reference by means of a frequency-to-voltage converter, resulting in better than 90 ppm/°C stability. The noise and jitter transfer characteristics of the loop were derived, and simulations were performed to see the effects of different noise types (white and 1/f noise) on the cumulative jitter of the locked ring oscillator. Finally, these results were verified by jitter measurements performed using an integrated time-to-digital converter (TDC) fabricated on the same die (0.18 μm CMOS process). The cumulative jitter of the on-chip reference-locked ring oscillator was less than 30 ps (sigma value) over a time range of 70 ns, which made it possible to use this oscillator as the heart of a TDC when aiming at centimetre-level precision (1 cm = 67 ps) in laser ranging.
Similar content being viewed by others
References
Nissinen, I., & Kostamovaara, J. (2009). On-chip voltage reference-based time-to-digital converter for pulsed time-of-flight laser radar measurements. IEEE Transaction on Instrumentation and Measurements, 58(6), 1938–1948.
Staszewski, R. B., et al. (2004). All-digital TX frequency synthesizer and discrete-time receiver for bluetooth radio in 130-nm CMOS. IEEE Journal of Solid-State Circuits, 39, 2278–2291.
Nelson, B., & Soma, M. (2004). On-chip calibration technique for delay line based BIST jitter measurement. In Proceedings of international symposium on circuits and systems (ISCAS’04), Vancouver, Canada, Vol. 1, pp. 944–947.
Djemouai, A., Sawan, M., & Slamani, M. (1999). New circuit techniques based on a high performance frequency-to-voltage converter. In Proceedings of IEEE international conference on electronics, circuits and systems (ICECS’99), Montreal, Canada, Vol. 1, pp. 13–16.
Djemouai, A., Sawan, M., & Slamani, M. (1998). High performance integrated CMOS frequency-to-voltage converter. In Proceedings of international conference on microelectronics (ICM’98), Monastir, Tunisia, pp. 63–66.
Chen, J., & Shi, B. (2003). 1 V CMOS current reference with 50 ppm/°C temperature coefficient. Electronics Letters, 39, 2.
Nissinen, I., & Kostamovaara, J. (2004). A low voltage CMOS constant current–voltage reference circuit. In Proceedings of international symposium on circuits and systems (ISCAS’04), Vancouver, Canada, Vol. 1, pp. 381–384.
Nissinen, I., & Kostamovaara, J. (2008). Noise and jitter transfer characteristics of an on-chip voltage reference-locked loop. In Proceedings of 26th IEEE NORCHIP conference, Tallinn, Estonia, pp. 212–216.
Hajimiri, A., & Lee, T. H. (2001). The design of low noise oscillators. USA: Kluwer. 4th Printing.
Leeson, D. B. (1966). A simple model of feedback oscillator noise spectrum. Proceedings of the IEEE, 54(2), 329.
Mantyniemi, A., Rahkonen, T., & Kostamovaara, J. (2009). A CMOS time-to-digital converter (TDC) based on a cyclic time domain successive approximation interpolation method. IEEE Journal of Solid-State Circuits, 44(11), 3067–3078.
Mota, M., et. al. (2000). A flexiple multi-channel high-resolution time-to-digital converter ASIC. In Proceedings of nuclear science symposium conference record, Lyon, France, Vol. 2, pp. 155–159.
Chen, P., et al. (2007). A PVT insensitive vernier-based time-to-digital converter with extended input range and high accuracy. IEEE Transaction on Nuclear Science, 54(2), 294–302.
Tisa, S., et al. (2003). Monolithic time-to-digital converter with 20 ps resolution. In Proceedings of European solid-state circuit conference (ESSCIRC’03), Estoril, Portugal, pp. 465–468.
Chen, C., et al. (2005). A precise cyclic CMOS time-to-digital converter with low thermal sensitivity. IEEE Transaction on Nuclear Science, 52(4), 834–838.
Acknowledgments
This work was supported financially by the Finnish Funding Agency for Technology and Innovation (TEKES), the Academy of Finland and certain industrial companies, all of which are gratefully acknowledged.
Author information
Authors and Affiliations
Corresponding author
Appendix
Appendix
Derivation of the closed-loop noise transfer of the voltage reference-locked ring oscillator.
In order to evaluate the phase noise of the voltage reference-locked ring oscillator with noiseless reference voltage, some noise (ωnoise(s)) has to be added to the point ωosc in Fig. 5 and closed-loop transfer function from that point back to the same point has to be derived. Because of the negative feedback the closed-loop noise transfer function (H no(s)) can be expressed as
As the transfer function of the operational amplifier (H(s) = 1/((s/ω p ) + 1)) can be assumed to be a low-pass, single-pole system, (A1) can be derived as
Because AK o K f ≫ M, the closed-loop noise transfer function can be expressed as
Rights and permissions
About this article
Cite this article
Nissinen, I., Kostamovaara, J. Jitter characteristics of an on-chip voltage reference-locked time-to-digital converter. Analog Integr Circ Sig Process 64, 271–280 (2010). https://doi.org/10.1007/s10470-010-9456-x
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10470-010-9456-x