Skip to main content

Two Dimensional Model for Threshold Voltage Roll-Off of Short Channel High-k Gate-Stack Double-Gate (DG) MOSFETs

  • Conference paper

Part of the book series: Environmental Science and Engineering ((ENVENG))

Abstract

In this paper a two-dimensional (2D) model of threshold voltage roll-off of uniformly doped high-k gate stack double-gate (DG) metal–oxide–semiconductor field-effect transistors (MOSFETs) is presented. The surface potential is obtained by solving the 2D Poisson’s equation using evanescent mode analysis and then it is used to model the threshold voltage roll-off. Threshold voltage roll-off variations against device channel length for different values of gate dielectric constant and silicon film thickness are shown. The modeling results show a good agreement with the numerical simulation data obtained by ATLAS™, a 2D device simulator from SILVACO.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   259.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Hardcover Book
USD   329.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. G Wilk, R M Wallace, J M Anthony, J. Appl. Phys., 89, 5243 (2001).

    Google Scholar 

  2. R M Wallace, G D Wilk, Crit. Rev. Solid State Mater. Sci., 28, 231 (2003).

    Google Scholar 

  3. J Robertson, Eur. Phys. J. Appl. Phys., 28, 265 (2004).

    Article  Google Scholar 

  4. R. Chaneliere C, S Four, JL Autran, RAB Devine, NP Sandler, J. Appl. Phys., 83, 4823 (1998).

    Google Scholar 

  5. SA Campbell, DC Gilmer, X-C Wang, M-T Hsieh, H-S Kim, WL Gladfelter, IEEE Trans. Electron Devices, 44 104 (1997).

    Article  Google Scholar 

  6. G. Zhang, Z. Shao, and K. Zhou, IEEE Trans. Electron Devices, 55, 803 (2008).

    Article  Google Scholar 

  7. S.-H. Oh, D. Monroe, and J. M. Hergenrother, IEEE Electron Device Lett., 21, 445 (2000).

    Article  Google Scholar 

  8. A. Dasgupta and S. K. Lahiri, IEEE Trans. Electron Devices, 35, 390 (1988).

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Ekta Goel .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2014 Springer International Publishing Switzerland

About this paper

Cite this paper

Goel, E., Kumar, S., Rawat, G., Kumar, M., Dubey, S., Jit, S. (2014). Two Dimensional Model for Threshold Voltage Roll-Off of Short Channel High-k Gate-Stack Double-Gate (DG) MOSFETs. In: Jain, V., Verma, A. (eds) Physics of Semiconductor Devices. Environmental Science and Engineering(). Springer, Cham. https://doi.org/10.1007/978-3-319-03002-9_48

Download citation

Publish with us

Policies and ethics